rtl仿真器-verilator安装和测试

安装

查看官网安装说明页
https://verilator.org/guide/latest/install.html
1.ubuntu 源已经加好了,直接用命令安装
在这里插入图片描述2. 编译源码安装:
sudo apt-get install git perl python3 make autoconf g++ flex bison ccache
sudo apt-get install libgoogle-perftools-dev numactl perl-doc
sudo apt-get install libfl2 # Ubuntu only (ignore if gives error)
sudo apt-get install libfl-dev # Ubuntu only (ignore if gives error)
sudo apt-get install zlibc zlib1g zlib1g-dev # Ubuntu only (ignore if gives error)

git clone https://github.com/verilator/verilator # Only first time

unset VERILATOR_ROOT # For bash

cd verilator
autoconf
./configure
make -j nproc # Build Verilator itself (if error, try just ‘make’,或者手动填cpu 核数-1)
sudo make install
安装GTKWave 看波形
sudo apt install gtkwave
= 功能测试用例
rtl
adder.v

module adder (
input a,b,
output [1:0] sum
);
assign sum=a+b;
endmodule
测试用例
sim_main.cpp

#include <stdio.h>
#include <stdlib.h>
#include <assert.h>

#include “Vadder.h” //adder.v会被编译成Vadder.h
#include “verilated.h”

#include “verilated_vcd_c.h” //可选,如果要导出vcd则需要加上

int main(int argc, char** argv) {
VerilatedContext* contextp = new VerilatedContext;
contextp->commandArgs(argc, argv);
Vadder* adder = new Vadder{contextp};

VerilatedVcdC* tfp = new VerilatedVcdC; //初始化VCD对象指针
contextp->traceEverOn(true); //打开追踪功能
adder->trace(tfp, 0); //
tfp->open("wave.vcd"); //设置输出的文件wave.vcd

int i=20;
while (!contextp->gotFinish() && i>=0) {
    int a = rand() & 1;
    int b = rand() & 1;
    adder->a = a;
    adder->b = b;
    adder->eval();
    printf("a = %d, b = %d, sum = %d\n", a, b, adder->sum);

    tfp->dump(contextp->time()); //dump wave
    contextp->timeInc(1); //推动仿真时间

    assert(adder->sum == a + b);

    i--;
}
delete adder;
tfp->close();
delete contextp;
return 0;

}

== 编译命令
verilator -Wall adder.v sim_main.cpp --cc --trace --exe --build

== 仿真
cd obj_dir
./Vadder

== 看波形
gtkwave wave.vcd在这里插入图片描述